Phoenix is an attempt to create a receive-only verion of a DFC SDR based on the discontinued Minerva Project.

The Phoenix implementation uses the following hardware:

• Alinx AX7103 PCIe FPGA development board
• Linear Technology DC854E LTC2217 ADC developmnet board
• Adafruit Feather MCU
• Adafruit Si5351A Clock Generator Breakout Board - 8KHz to 160MHz

I created a blog on the development of the FPGA code on element14.com/ You can check that out here Go to April 12 for the current status.

Using the new DFC (Direct Fourier Conversion) protocol for input of ADC samples, it processes those samples with a CUDA capable GPU.
It then forwards the resultant IQ data via the new openHPSDR protocol to a second program that distributes them to one or more dsp servers.

The last step is to design/build an RF friendly front end for the ADC. This is above my pay grade, I need help from the community!

The following is a collection of front end schematics to use as a starting point for discussion:

The DC854E development board:

The Atlas receiver:

The Anan200D receiver:

The Minerva receiver:

The Redpitaya receiver:

The BBRF103 receiver:

The RX888 receiver:

I plan to attach the new front end directly to the LTC2217 by removing R10 & R14 then attaching a pigtail

The resistors are marked in red. May also remove C5 for clearance.

You can reach me at: ad0es